1. Field of the Invention
The present invention relates in general to oscillators, and more specifically to an automatic calibration system for an overtone crystal oscillator.
2. Description of the Related Art
A phase-locked loop (PLL) is a basic building block in many electronic circuits, including communication systems and the like, for providing requisite operating frequencies. A timing reference, such as a crystal oscillator, provides a reference frequency FREF which is multiplied by a PLL circuit to achieve a higher output frequency FOUT. Crystal oscillators are highly accurate and thus are often used for providing the reference frequency. It is desired to provide a crystal oscillator having its reference frequency (FREF) as high as possible. Higher crystal oscillator reference frequencies allow for lower synthesizer close-in phase noise, lower loop divider ratios, and wider PLL bandwidths. The wider PLL bandwidths allow for lower cost and complexity when supporting wider modulation bandwidths in communications systems. Inverted-mesa crystals may be used to achieve higher frequencies, but tend to be delicate and expensive. An overtone crystal oscillator is often used to provide the timing reference at a relatively high frequency, such as 100 megahertz (MHz) or more, while avoiding the cost of an expensive inverted-mesa crystal.
An overtone crystal oscillator is an oscillator using a crystal having a fundamental mode of oscillation which is suppressed by additional circuitry, where the additional circuitry is further designed to ensure oscillation at a higher harmonic frequency, otherwise called the overtone. The oscillator is designed to cause the overtone crystal to oscillate at odd harmonic frequencies or overtones, such as the third overtone (3OT). In many conventional configurations a resonant inductor-capacitor (LC) circuit is employed to suppress oscillation at the fundamental frequency of the overtone crystal. A coil-less solution is known using differential bipolar transistor circuit topologies. In the ideal case, the components of the overtone crystal oscillator are manufactured within ideal tolerances to provide desired loop gain and frequency response to ensure oscillation upon startup at a specific overtone frequency of the overtone crystal. The ideally manufactured overtone crystal oscillator exhibits minimal operating current drain. As understood by those of ordinary skill in the art, however, significant process induced variations can and do occur during manufacturing. Such process induced variations alter loop gain and frequency response and may render the overtone crystal oscillator inoperative without some type of startup circuitry.
Conventional crystal oscillator startup circuits usually increase oscillator loop gain to ensure startup, but do not intentionally and significantly alter both the loop gain and frequency response to guarantee oscillator startup on a specific overtone frequency of the crystal. Substantial negative impact may result from process variance on startup behavior. Current drain goals for the overtone oscillator are difficult to obtain with sufficient startup margin over the process variation window. It is desired to substantially improve manufacturability and to reduce current drain of overtone reference oscillators in the presence of variance in semiconductor process and crystal loss. It is desired to provide an overtone crystal oscillator startup circuit which enables minimum current drain despite process and crystal loss variance.